Optical disk, optical disk recording method and optical disk apparatus

ABSTRACT

A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is based upon and claims the benefit of priorityfrom the prior Japanese Patent Application No. 2000-151421, filed May23, 2000, the entire contents of which are incorporated herein byreference.

BACKGROUND OF THE INVENTION

[0002] This invention relates to an optical disk on which data isrecorded, a recording method for recording data on the optical disk, andan apparatus for recording and reproducing data on the optical disk.

[0003] Recently, DVD systems have been developed to meet therequirements for recording MPEG2 images on one surface of an opticaldisk having a diameter of 12 cm for two hours or more. Present DVDstandards state that the memory capacity of the disk is 4.7 GB for onesurface, the track density is 0.74 μm/track, and the linear density is0.267 μm/bit. A DVD based on the above standards is referred to as apresent DVD in this specification.

[0004] Reproduction of information recorded on an optical disk such as aDVD is performed by use of an optical head. In the optical head, a lightbeam emitted from an LD (laser diode) is focused on a pit series formedon the track of the optical disk via an object lens, a light beamreflected from the optical disk is concentrated on a photo-detector byuse of a condensing lens and thus a reproduction signal can be attained.The reproduction signal from the photo-detector is input to areproduction signal processing system and subjected to waveformequalization by an equalizer, and then data is decoded by use of adetector. According to DVD standards, the wavelength of the LD in theoptical head is 0.65 μm and the numerical aperture of the object lens is0.6.

[0005] As a higher definition system is required as an image source, itis required to further increase the memory capacity of the DVD in orderto record and supply such image data. In order to satisfy the aboverequirement, the wavelength of the LD is reduced to attain a higherrecording density expressed in terms of the wavelength, thus requiringfurther study on increasing the memory capacity using the PRML (PartialResponse Maximum Likelihood) signal process.

[0006] In the conventional signal detection method, whether the recordedinformation is “0” or “1” is determined for each bit. Since the intervalbetween pits or marks becomes shorter as the information recordingdensity is increased, the influence of waveform interference by theadjacent information bit on the reproduction signal also increases.

[0007] In order to eliminate the influence of waveform interference, itis necessary to perform a signal process to emphasize the high frequencycomponent of the response characteristic of the recording/reproductionchannel and suppress the skirt portion of the response waveformextending to the adjacent bit to a low level.

[0008] However, since the noise component is also emphasized if the highfrequency component of the response characteristic is emphasized, thenumber of errors caused by the emphasizing process consequentiallyincreases. Therefore, it is difficult to significantly improve therecording density using the conventional signal processing system.

[0009] On the other hand, in the PRML signal processing system, awaveform interference amount between adjacent bits of the reproductionsignal waveform is permitted in a range specified by the PR (Partialresponse) class. Since the reproduced waveform is influenced by thewaveform interference from the adjacent bit and distorted, it becomesimpossible to determine data by use of only one bit as in theconventional system.

[0010] However, since the waveform interference amount is limited to aspecified value, signal power dispersed before and after an informationbit can be efficiently utilized if a Maximum Likelihood detector usingan ML (Maximum Likelihood) determination circuit for selecting data ofthe most likelihood among the sequence by taking portions before andafter the waveform into consideration is used, and therefore, data canbe detected at a relatively low error rate. A PR equalizer is used as anequalizing circuit for correcting a deviation of the reproductionwaveform from the PR class.

[0011] In conventional level slice equalizers, the reproduced waveformis subjected to a waveform equalization process to set the intersectingpoint between the equalized waveform and a certain threshold level atthe center of the window. More specifically, the high frequencycomponent of the reproduced signal is amplified. In the detector, anintersecting point between the equalized waveform and the certainthreshold level is detected and if the intersecting point is detected inthe window, binary data “1” is output, and if it is not detected, binarydata “0” is output. Then, by subjecting the binary data obtained afterdetection of the intersecting point to an NRZI (Non Return ZeroInverted) conversion process, the decoded data can be attained.

[0012] The intersecting point between the equalized waveform and thethreshold level does not always exist at the center of the window due tothe presence of noise. The standard deviation of intersecting point datastandardized according to the window width is called “jitter” and isused as an evaluation standard for optical disks and drive units.

[0013] Now, a case wherein an optical disk whose recording density ismade higher than present DVDs is reproduced by use of the same opticalhead as that of the present DVD is considered. If the track density isincreased, a reproduction signal may contain a large amount ofsignal-degrading component called “crosstalk”. On the other hand, if thelinear density is increased, the reproduced waveform becomes dull. Asdescribed before, in the equalizer, since the high frequency componentof the reproducing signal is amplified, it is necessary to more stronglyamplify the high frequency component when an input reproduced waveformbecomes duller. As a result, the equalizer also amplifies thesignal-degrading component. Thus, if the waveform slice system is usedfor the signal detection system, the signal-degrading component isincreased irrespective of the method for increasing recording density,therefore data cannot be correctly decoded.

[0014] As the reproduction signal processing system used when the SNR(signal/noise ratio) of the reproduction signal is lowered, utilizationof a PRML (Partial Response and Maximum Likelihood) system instead ofthe waveform slice system is studied. In the PRML system, the reproducedwaveform is equalized into a waveform having a known correlation betweenidentification points called a PR characteristic by use of theequalizer.

[0015] Further, the PRML signal processing system can attain asatisfactory (low) error rate in the case of high recording density.This system is a system for detecting data by use of the correlationbetween information bits while permitting waveform interference.Therefore, a delay occurs because a sample data series is stored into abus memory as shown in FIG. 9 which will be described later.

[0016] In the process for detecting user data, generally, the abovedelay does not cause any problems. However, in the header field, since areadout sector number is fed back to the later operation, the influencebecomes larger.

[0017] That is, in a data writing process, a sector number is read outfrom the header field, and if the number is determined as ato-be-accessed sector, the readout operation must be immediatelyinterrupted, which affects the write operation. Further, if the numberis not the object sector, the write operation is disabled since datawill be destroyed. Therefore, if detection of the number necessary forthe above determination is delayed, it becomes necessary to take a largeGAP field of FIG. 10 which will be described later in order to take asufficiently long time corresponding to the delay time and thus theformat efficiency is degraded accordingly.

[0018] In the conventional header field, only one address mark AM forattaining byte synchronization is provided after VFO. The constructionis satisfactory when a clock phase pull-in process is completelyterminated in the VFO field, but if the phase pull-in process is notcompletely performed due to a disturbance, for example, data after thiscannot be correctly read out.

[0019] Therefore, it is required to provide a device capable ofsuppressing the time delay caused when an address of the header field isread out, reducing the interval of a gap field required between theheader field and the recording field and improving the formatefficiency.

[0020] Further, it is required to provide a device capable of error-freereadout of an address of the header field.

[0021] This invention can solve the above problems, suppress the timedelay caused when an address of the header field is read out, reduce theinterval of a gap field required between the header field and therecording field and improve the format efficiency.

[0022] Further, this invention can read out an address of the headerfield without error.

BRIEF SUMMARY OF THE INVENTION

[0023] An optical disk of this invention comprises header fields whichare provided on tracks of a concentric form or spiral form and in whichaddresses each indicating a position on the track are previouslyrecorded; and recording fields which respectively follow the headerfields and in which preset data is recorded; wherein the recordingdensity of the header field is lower than that of the recording field.

[0024] An optical disk recording method of this invention is a methodfor recording data on an optical disk having header fields which areprovided on tracks of a concentric form or spiral form and in whichaddresses each indicating a position on the track are previouslyrecorded, and recording fields which respectively follow the headerfields and in which preset data is recorded; wherein data is recorded inthe recording field with a recording density higher than the recordingdensity of the header field.

[0025] An optical disk apparatus of this invention for recording data onan optical disk having header fields which are provided on tracks of aconcentric form or spiral form and in which addresses each indicating aposition on the track are previously recorded, and recording fieldswhich respectively follow the header fields and in which preset data isrecorded and reproducing data recorded on the optical disk, comprisesfirst reproduction means for reproducing data in the header field;second reproduction means for reproducing data in the recording field;determining means for determining whether a signal now reproduced is asignal from the header field or a signal from the recording field; andprocessing means for reproducing data by use of the first reproductionmeans when the determining means determines that the signal nowreproduced is a signal from the header field and reproducing data by useof the second reproduction means when the determining means determinesthat the signal now reproduced is a signal from the recording field.

[0026] An optical disk apparatus of this invention for recording data onan optical disk having header fields which are provided on tracks of aconcentric form or spiral form and in which addresses each indicating aposition on the track and at least one pattern for detecting the addressare previously recorded, and recording fields which respectively followthe header fields and in which preset data is recorded and reproducingdata recorded on the optical disk, comprises first reproduction meansfor reproducing data in the header field; second reproduction means forreproducing data in the recording field; recording means for recordingdata in the recording field; first detecting means for detecting thepattern used for detecting the address recorded in the header fieldbased on a reproduction signal from the first reproduction means; seconddetecting means for detecting the address recorded in the header fieldbased on a detection process of the first detecting means; andprocessing means for reproducing data in a corresponding portion of therecording field by use of the second reproduction means or recordingdata in a corresponding portion of the recording field by use of therecording means when the address detected by the second detecting meanscomes to an access position.

[0027] Additional objects and advantages of the invention will be setforth in the description which follows, and in part will be obvious fromthe description, or may be learned by practice of the invention. Theobjects and advantages of the invention may be realized and obtained bymeans of the instrumentalities and combinations particularly pointed outhereinafter.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING

[0028] The accompanying drawings, which are incorporated in andconstitute a part of the specification, illustrate presently preferredembodiments of the invention, and together with the general descriptiongiven above and the detailed description of the preferred embodimentsgiven below, serve to explain the principles of the invention.

[0029]FIG. 1 is a view showing the schematic construction of an opticaldisk;

[0030]FIG. 2 is a view for illustrating the state of pre-format data ofa header field of the optical disk and grooves and lands of thesurrounding portion;

[0031]FIG. 3 is a diagram for explaining the state of pre-format data ofa header field of the optical disk and grooves and lands of thesurrounding portion;

[0032]FIG. 4 is a view for illustrating the state of pre-format data ofa header field of the optical disk and grooves and lands of thesurrounding portion;

[0033]FIG. 5 is a diagram for explaining the state of pre-format data ofa header field of the optical disk and grooves and lands of thesurrounding portion;

[0034]FIG. 6 is a diagram for explaining the state of pre-format data ofa header field of the optical disk and grooves and lands of thesurrounding portion;

[0035]FIG. 7 is a view for illustrating zones of the optical disk;

[0036]FIG. 8 is a diagram for explaining ECC block data;

[0037]FIG. 9 is a diagram for explaining the frame construction of eachsector;

[0038]FIG. 10 is a diagram showing a sector format of each sector;

[0039]FIG. 11 is a diagram showing a format of another embodiment of theheader field;

[0040]FIG. 12 is a diagram showing the schematic construction of anoptical disk apparatus;

[0041]FIG. 13 is a circuit diagram showing the schematic construction ofa signal detecting section and signal determining circuit;

[0042]FIG. 14 is a block diagram showing a schematic construction of alevel slice signal processing circuit and PRML signal processingcircuit;

[0043]FIGS. 15A to 15F are diagrams showing signal waveforms and datavalues at main portions of the level slice signal processing circuit;

[0044]FIGS. 16A to 16G are diagrams showing signal waveforms and datavalues at main portions of the PRML signal processing circuit;

[0045]FIGS. 17A to 17C are diagrams for illustrating the decodingprocess using an ML decoder;

[0046]FIGS. 18A to 18D are diagrams showing signal waveforms in thesignal determining circuit;

[0047]FIG. 19 is a diagram showing the schematic construction of anequalizer and ML decoder;

[0048]FIG. 20 is a diagram for illustrating a change in the state ofACS;

[0049]FIGS. 21A, 21B are diagrams for illustrating a 1,7 modulationprocess;

[0050]FIGS. 22A to 22F are diagrams showing a difference in the datadetection window width according to modulation codes;

[0051]FIG. 23 is a flowchart for illustrating the data recording processand data reproducing process;

[0052]FIG. 24 is a diagram showing the schematic construction of anoptical disk apparatus according to another embodiment;

[0053]FIG. 25 is a flowchart for illustrating the data recording processand data reproduction process;

[0054]FIG. 26 is a diagram showing the schematic construction of anoptical disk apparatus according to another embodiment;

[0055]FIG. 27 is a block diagram showing the schematic construction of alevel slice signal processing circuit and PRML signal processingcircuit;

[0056]FIG. 28 is a flowchart for illustrating the data recording processand data reproducing process;

[0057]FIG. 29 is a diagram showing the layout of a header field inanother embodiment;

[0058]FIG. 30 is a diagram showing the circuit construction of an IDdetecting section;

[0059]FIG. 31 is a diagram showing the schematic construction of anoptical disk apparatus according to another embodiment;

[0060]FIG. 32 is a flowchart for illustrating the ID detecting processin the ID detecting section;

[0061]FIG. 33 is a flowchart for illustrating the ID detecting processin the ID detecting section;

[0062]FIG. 34 is a diagram for illustrating an example of a process fordistributing and recording ID information into a plurality of sectors;and

[0063]FIG. 35 is a diagram for illustrating an example of a process fordistributing and recording ID information into a plurality of sectors.

DETAILED DESCRIPTION OF THE INVENTION

[0064] There will now be described embodiments of this invention withreference to the accompanying drawings.

[0065]FIGS. 1, 2, 3 show the schematic constructions (one example of theform of a track) of an optical disk 1 of this invention.

[0066] The optical disk 1 has grooves 2 which are previously wobbled fortracking and in which data is recorded and header portions (headerfields) 3 having pre-pit (emboss pit) strings each indicating a trackaddress or the like. Lands 4 are provided in positions adjacent to thegrooves 2.

[0067] Data is recorded in the groove 2 by use of recording marks 5based on a phase change. For example, data is recorded by use of therecording marks 5 based on the 1,7 RLL (Run Length Limited) modulationprocess. For example, user data is recorded in the groove 2 based on amark edge form.

[0068] Data is recorded in the header field 3 by use of pre-pits 6previously formed, for example, formed at the time of formation of thegrooves. For example, data is recorded by use of the pre-pits 6 based onthe 8-16 RLL modulation process. Further, for example, address data isrecorded in the header field 3 based on a mark position form.

[0069] As shown in FIG. 1, the grooves 2 of the optical disk 1 arepreviously wobbled in a preset cycle for tracking. For example, groovesfor tacking are wobbled in a preset cycle in order to obtain a signalused as a reference at the data recording time.

[0070] The header field 3 is formed at the time of formation of thegrooves. As shown in FIGS. 2, 3, the header field 3 includes a pluralityof header fields 3 a, 3 b, 3 c, 3 d each formed of a plurality of pitsand is pre-formatted with respect to the grooves 2 as shown in FIGS. 2,3 and the center of each pit lies on the same line which passes throughthe center of the amplitude of corresponding grooves 2.

[0071] The optical disk 1 is explained by taking a case wherein data isrecorded in the grooves as an example, but the optical disk is notlimited to this case and the optical disk in which data can be recordedin both of the lands and grooves may be used (DVD-RAM).

[0072] In this case, as shown in FIGS. 4, 5, 6, the optical disk hasgrooves 7 previously wobbled for tracking and header fields 8 havingpre-pit (emboss pit) strings each indicating a track address or thelike.

[0073] That is, the grooves 7 for tacking are wobbled in a preset cyclein order to obtain a signal used as a reference at the data recordingtime.

[0074] The header field 8 is formed at the time of formation of thegrooves. As shown in FIGS. 5, 6, the header field 8 includes a pluralityof header fields 8 a, 8 b, 8 c, 8 d each formed of a plurality of pitsand is pre-formatted with respect to the grooves 7 as shown in FIGS. 5,6 and the center of each pit lies on the boundary line between thegroove 7 and the land 9. FIG. 5 shows the header field 8 attached to thehead sector of each track and FIG. 6 shows the header field 8 attachedto one of sectors other than the head sector provided in each track.

[0075] In this case, the header fields 8 for the grooves and the headerfields 8 for the lands are arranged alternately (in a staggered form).

[0076] The grooves and lands can be formed in a concentric form insteadof the spiral form.

[0077] In this embodiment, it is assumed that data is recorded based ona zone CLV (ZCLV) system. The ZCLV system is a system for dividing theplurality of tracks into several zones and keeping constant the rotatingspeed of the disk in the same zone. The recording frequency is keptconstant for the entire circumference. Therefore, the recording capacityof each track in the same zone is the same. In FIG. 7, the clock signalsfor the respective zones are the same and the rotating speeds of theoptical disk 1 for the respective zones and the numbers of sectors foreach track are different.

[0078] In this embodiment, the term “sector” is used to indicate aminimum unit which can be used for recording, reproducing and rewriting.In the DVD format, 16 sectors constitute one ECC block. In theconstruction of the ECC block of the DVD, parity is distributed andrecorded in the sectors.

[0079] Therefore, data can be rewritten in the sector unit as a binarydata string. However, since a defect occurs in the parity if data ofonly one sector is rewritten, data can be rewritten only in the ECCblock unit as significant data. In this respect, it can be said that therewritable unit is an ECC block, but in this embodiment, the “sector”used as a unit to which access of binary data string can be made iscalled a “minimum recordable unit”.

[0080] That is, as shown in FIG. 7, the optical disk 1 is constructed of35 zones, for example, and the rotating speeds (the reference speed foreach zone) of the optical disk 1 for the respective zones and thenumbers of sectors for each track are different.

[0081] Each zone includes a plurality of (1568) tracks in the radialdirection.

[0082] In each zone, the rotation speed of the optical disk 1 becomeslower and the number of sectors for each track becomes larger in aportion on the inner side of the optical disk than in a portion on theouter side.

[0083] As shown in FIG. 8, data is recorded in the tracks of each zonefor each ECC (error correction code) block data unit (for example, 38688bytes) used as a data recording unit.

[0084] The ECC block includes 16 sectors in which 2-kilobyte data isrecorded, each of sector ID (identification data) items 1 to 16 of4-byte (32-bit) configuration used as address data is attached to themain data (sector data) together with an error detection code (IED: IDError Detection Code) of 2-byte configuration for each sector, andlateral ECCs (Error Correction Codes) 1 and longitudinal ECCs 2 used aserror correction codes for reproduction data recorded in the ECC block.The ECCs 1, 2 are error correction codes attached to data as redundancywords for ensuring reproduction of data in the case that defects existin the optical disk 1.

[0085] Each sector is constructed by data of 172 bytes×12 rows, and thelateral ECC 1 of 10-byte configuration is attached for each row (line)and the longitudinal ECC 2 of one row with 182-byte configuration isattached. Thus, an error correcting section 27 which will be describedlater performs an error correction process for each line by use of thelateral ECC 1 and performs an error correction process for each columnby use of the longitudinal ECC 2.

[0086] When the ECC block is recorded on the optical disk 1, a sync code(2 bytes: 32 channel bits) for taking byte synchronization at the datareproducing time is attached for every preset data amount (for everypreset data length interval, for example, 91 bytes: 1456 channel bits)of each sector.

[0087] As shown in FIG. 9, each sector is constructed by 26 frames(frame=91 bytes: 1456 channel bits) from frame zero to a 25th frame. Thesync code (frame sync signal) attached to each frame is constructed by aspecification code (one byte: 16 channel bits) for specifying a framenumber and a common code (one byte: 16 channel bits) commonly used foreach frame.

[0088]FIG. 9 shows the construction of a physical sector in the DVD. Itis constructed by 26 SYNC frames starting from a 32-channel bit SYNCcode (sync code) and the channel bits are set to 38688 channel bits intotal.

[0089] The format of each sector is shown in FIG. 10.

[0090] In FIG. 10, one sector is constructed by 2697 bytes and includesa 128-byte header field (corresponding to the header section) 3, 8,2-byte mirror field 10 and 2567-byte recording field 11.

[0091] The channel bit recorded in the header field 3, 8 of the sectortakes a form subjected to 8-16 RLL modulation. The channel bit recordedin the recording field 11 of the sector takes a form subjected to 1,7RLL modulation. In the header field 3, 8, address data is recordedaccording to the mark position form. In the recording field 11, userdata is recorded according to the mark edge form.

[0092] The header field 3, 8 is an area in which preset data is recordedwhen the optical disk 1 is formed. The header field 3, 8 is constructedby four header fields of header 1 field 3 a, 8 a, header 2 field 3 b, 8b, header 3 field 3 c, 8 c and header 4 field 3 d, 8 d.

[0093] Each of the header 1 field 3 a, 8 a to header 4 field 3 d, 8 d isconstructed by 46 bytes or 18 bytes and includes a 36-byte or 8-bytesync code portion VFO (Variable Frequency Oscillator), 3-byte addressmark AM (Address Mark), 4-byte address portion PID (PositionIdentifier), 2-byte error detection code IED (ID Error Detection Code)and one-byte post amble PA (Post Ambles).

[0094] The header 1 field 3 a, 8 a and header 3 field 3 c, 8 c include a36-byte sync code portion VFO 1 and the header 2 field 3 b, 8 b andheader 4 field 3 d, 8 d include an 8-byte sync code portion VFO 2.

[0095] The sync code portion VFOs 1, 2 are fields for performing thepull-in process of the PLL, and the sync code portion VFO 1 is obtainedby repeatedly recording “00010001” in channel bits by 36 bytes (576 bitsin channel bits) (repeatedly recording a pattern with a preset interval)and the sync code portion VFO 2 is obtained by repeatedly recording“00010001” in channel bits by 8 bytes (128 bits in channel bits). Thesync code portion VFO 1 is a successive pattern of so-called 4T.

[0096] The address mark AM is a 3-byte sync code indicating a positionin which a sector address starts and is constructed by a 48-bit channelcode. As the pattern of the respective bytes of the address mark AM, aspecial pattern of

[0097] “000100010000000000000100010001000000000000010001”

[0098] which does not appear in the data portion is used.

[0099] The address portion PIDs 1 to 4 are fields in which sectornumbers are recorded as 4-byte addresses. The sector number is aphysical sector number indicating a physical position on the track ofthe optical disk 1, and since the physical sector number is recorded inthe mastering process, it cannot be rewritten.

[0100] The address portion PID (1 to 4) includes one-byte (8-bit) sectorinformation and 3-byte sector number (physical sector number as aphysical address indicating a physical position on the track). Thesector information includes a 2-bit reserve field, 2-bit physical IDnumber field, 3-bit sector type field and one-bit layer number field.

[0101] The physical ID number is “1” in the case of PID 1, for example,and is a number indicating the order in which data is overwritten byfour times in the header field 3, 8.

[0102] In the sector type field, codes indicating the first sector andlast sector of the track are recorded.

[0103] The error detection code IED is used for the sector address(containing the ID number) and for detecting whether or not an error ispresent in the readout PID.

[0104] The post amble PA contains state information necessary fordemodulation and also has a function of polarity adjustment forterminating the header field 51 in space.

[0105] The mirror field 10 is used for offset correction of a trackingerror signal and timing generation of a land/groove changeover signal,for example.

[0106] The recording field 11 includes a 10-byte or 11-byte gap field,20-byte to 27-byte guard 1 field, 35-byte VFO 3 field, 3-bytepre-synchronous code (PS) field, 2418-byte data field, one-byte postamble 3 (PA3) field, 48-byte to 55-byte guard 2 field and 24-byte or25-byte buffer field.

[0107] The gap field is a field in which nothing is written.

[0108] The guard 1 field is a field for preventing terminaldeterioration caused at the repetitive recording time inherent in aphase change recording medium from giving an influence on the VFO 3field.

[0109] The VFO 3 field is used for repeatedly recording “00010001” inchannel bits by 35 bytes (560 bits in channel bits) in the PLL lockfield.

[0110] The PS (pre-synchronous code) field is a synchronization fieldfor connection to the data field.

[0111] The data field is a field including data ID, data ID errordetection code IED, sync code, ECC (Error Correction Code), EDC (ErrorDetection Code) and user data. The data ID is sector data of 4-byte(32-channel bit) configuration of each sector. The data ID errordetection code IED is an error detection code of 2-byte (16-bit)configuration for data ID.

[0112] The PA (post amble) 3 field is a field containing stateinformation necessary for demodulation and indicating the end of thelast byte of the preceding data field.

[0113] The guard 2 field is a field which prevents terminaldeterioration from influencing the data field. Terminal deterioration,inherent in phase change recording media, is caused by repetitiverecording.

[0114] The buffer field is a field provided for absorbing variations inrotation of the optical disk 1 so as to prevent the recording field fromextending into the next header field 3, 8.

[0115] The reason why the gap field is expressed to be constructed by 10or 11 bytes is that random shifting is performed. Random shifting shiftsthe data write starting position to reduce repetitive recordingdegradation of the phase change recording medium. The length of randomshifting is adjusted by use of the buffer field lying in the lastportion of the recording field and the total length thereof in onesector is a constant 2697 bytes.

[0116] Next, anther embodiment of the header field 3, 8 is explainedwith reference to FIG. 11. Portions which are the same as those of FIG.10 are denoted by the same reference numerals and the explanationthereof is omitted.

[0117] The header field 3, 8 includes four header fields of header 1field 3 a′, 8 a′, header 2 field 3 b, 8 b, header 3 field 3 c′, 8 c′ andheader 4 field 3 d, 8 d.

[0118] The header 1 field 3 a′, 8 a′ is constructed by 46 bytes andincludes a 6-byte sync code portion VFO arranged in the top portion anda 3-byte address mark AM, 4-byte address portion PID 1, 2-byte errordetection code IED 1 and one-byte post amble PA 1 which are repeatedlyrecorded by four times after the VFO.

[0119] The header 3 field 3 c′, 8 c′ is constructed by 46 bytes andincludes a 6-byte sync code portion VFO arranged in the top portion anda 3-byte address mark AM, 4-byte address portion PID 3, 2-byte errordetection code IED 3 and one-byte post amble PA 1 which are repeatedlyrecorded by four times after the VFO.

[0120] Therefore, a total of 10 bytes of AM, PID, IED, PA is repeatedlyrecorded by four times after the 6-byte sync code portion VFO. As aresult, the pull-in time the PLL becomes longer than in a case whereinonly the exclusive VFO pattern (36 bytes) is used, but since thepossibility of reading ID information repeatedly recorded can beenhanced if the margin of the header field is large, it becomes moreadvantageous than the construction of FIG. 10.

[0121] Next, an optical disk apparatus 21 for dealing with the opticaldisk 1 is explained with reference to FIG. 12.

[0122] The optical disk apparatus 21 records data on the optical disk 1and reproduces data recorded on the optical disk 1 while it rotates theoptical disk 1 at different speeds for respective zones.

[0123] As shown in FIG. 12, the main portion of the optical diskapparatus 21 includes an optical pickup section (optical head) 22, levelslice signal processing circuit 23, PRML signal processing circuit 24,signal determining circuit 25, drive control circuit 26, errorcorrecting section 27, host device interface 28, modulator 29, writecompensation circuit 30, write driver 31, servo controller 32 andspindle motor 33.

[0124] The optical pickup section 22 has an object lens 34. In theoptical head section 22, a semiconductor laser unit (not shown) isprovided to face the object lens 34 and energized by the write driver 31used as a laser control unit to generate laser rays of an appropriatewavelength. When the semiconductor laser unit is energized, laser lightproperly applied to the optical head 1 is directed to the object lens 34and converged on the optical disk 1 by the object lens 34. Data iswritten on (creation of a mark string: data is written on the opticaldisk 1 according to the interval between variable length marks and thelength of each variable length mark) or reproduced from the optical disk1 by use of the converged laser light.

[0125] Setting contents of the write driver 31 are set by the writecompensation circuit 30 and are different depending on the reproductionpower for obtaining a reproducing signal, recording power for recordingdata and erasing power for erasing data. The laser light has three powerlevels: the reproduction power, recording power and erasing power, andthe semiconductor laser unit is energized by the write driver 31 so asto emit laser light of appropriate power.

[0126] The optical disk 1 is directly carried into the apparatus by useof a tray (not shown) or carried into the apparatus after being receivedinto a disk cartridge (not shown) so that the optical disk 1 will bearranged to face the object lens 34. A tray motor (not shown) fordriving the above tray is provided in the apparatus. Further, the loadedoptical disk 1 is rotatably held on the spindle motor 33 by a damper(not shown) and rotated by the spindle motor 33.

[0127] The optical pickup section 22 has a signal detecting section 35.As shown in FIG. 13, the signal detecting section 35 includes amplifiers41 a, 41 b, 41 c, 41 d for converting current signals of detectionsignals (Ia, Ib, Ic, Id) from a photo-detector 40 used as aphoto-detector for detecting laser light into voltage signals, an adder42 a for adding together the signals from the amplifiers 41 a, 41 b, anadder 42 b for adding together the signals from the amplifiers 41 c, 41d, and a subtracter 43 for subtracting the signal output from the adder42 b from the signal output of the adder 42 a.

[0128] A signal from the subtracter 43 or an output signal of the signaldetecting section 35 is output to the level slice signal processingcircuit 23 for reproducing data of the header field 3, 8, and to thePRML signal processing circuit 24 for reproducing data of the recordingfield 11 and the signal determining circuit 25.

[0129] Further, a servo signal (track error signal, focus error signal)is generated by a signal processing circuit (not shown) based on thesignals from amplifiers 81 a, 81 b, 81 c, 81 d and output to the servocontroller 32.

[0130] As a method for optically detecting a focus deviation amount, thefollowing methods are given, for example.

Astigmatism Method

[0131] This is a method for detecting variations in laser lightirradiated on to the photo-detector 40 by use of an optical element (notshown) for causing astigmatism to occur which is disposed on an opticaldetection path of laser light reflected from a light reflecting film orlight reflective recording film of the optical disk 1. Thephoto-detecting area is divided into four areas along diagonal lines. Adifference between the sums of the detection signals obtained from therespective diagonal detection areas is derived by a signal processingcircuit (not shown) and used as a focus error detection signal (focussignal).

Knife-Edge Method

[0132] This is a method using a knife edge disposed fornon-symmetrically shielding part of the laser light reflected from theoptical disk 1. The photo-detecting area is divided into to two areasand the difference between the detection signals obtained from therespective detection areas is derived as a focus error detection signal.

[0133] Generally, either the astigmatism method or the knife-edge methodis used.

[0134] The optical disk 1 has tracks in a spiral form or concentric formand information is recorded on the track. Information is reproduced orrecorded/erased by tracing a focused light spot along the track. Inorder to stably trace the focused light spot along the track, it isnecessary to optically detect a relative positional deviation betweenthe track and the focused light spot.

[0135] As the track deviation detecting method, the following methodsare generally used.

Differential Phase Detection Method

[0136] A variation in the intensity distribution of laser lightreflected from a light reflecting film or light reflective recordingfilm of the optical disk 1 on the photo-detector 40 is detected. Thephoto-detecting area is divided into four areas along diagonal lines. Aphase difference between the sums of the detection signals obtained fromthe respective diagonal detection areas is derived by a signalprocessing circuit (not shown) and used as a track error detectionsignal (tracking signal).

Push-Pull Method

[0137] A variation in the intensity distribution of laser lightreflected from the optical disk 1 on the photo-detector is detected. Thephoto-detecting area is divided into two areas and a difference betweenthe detection signals obtained from the respective detection areas isderived and used as a track error detection signal.

Twin-Spot Method

[0138] For example, a diffraction element is disposed in a lighttransmission system between the semiconductor laser element and theoptical disk 1 to divide light into a plurality of wave surfaces anddetect a variation in the reflected light amount of ±primary diffractedlight applied to the optical disk 1. A photo-detecting area forindividually detecting the reflected light amount of +primary diffractedlight and the reflected light amount of −primary diffracted light isdisposed in addition to the photo-detecting area for detecting thereproducing signal and a track error detection signal is obtained byderiving a difference between the detection signals.

[0139] The signal processing system on the reproducing side has twosystems including a system (level slice signal processing circuit 23)for processing a signal from the header field 3, 8 by use of the levelslice system having less detection delay and a system (PRML signalprocessing circuit 24) for processing a signal from the recording field11 for recording user data by use of the PRML signal processing systemwhich can attain high-density recording.

[0140] As shown in FIG. 14, the level slice signal processing circuit 23includes an AGC (Automatic Gain Control) amplifier 51, adder 52,equalizer 53, level slice detector 54, PLL circuit 55, 8-16 RLLdemodulator 56, AGC controller 57 and offset controller 58.

[0141] The AGC amplifier 51 corrects the level of a signal from thesignal detector 35 according to a control signal from the AGC controller57 and outputs the corrected signal to the adder 52. The adder 52 addsthe signal from the AGC amplifier 51 with an offset signal from theoffset controller 58 and outputs the result of addition to the equalizer53.

[0142] The equalizer 53 subjects the waveform (reproduced waveform) ofthe reproduction signal from the adder 52 to waveform equalization sothat an intersecting point between the equalized waveform and a certainthreshold level will be set at the center of the window and then outputsthe result of equalization to the level slice detector 54, AGCcontroller 57 and offset controller 58.

[0143] The level slice detector 54 detects an intersecting point betweenthe equalized waveform from the equalizer 53 and the threshold levelaccording to a channel clock from the PLL circuit 55, and if theintersecting point is detected in the window, binary data “1” is outputto the 8-16 RLL demodulator 56, and if the intersecting point is notdetected in the window, binary data “0” is output to the 8-16 RLLdemodulator 56.

[0144] The PLL circuit 55 generates a channel clock based on a signalfrom the level slice detector 54 and outputs the channel clock to the8-16 RLL demodulator 56.

[0145] The 8-16 RLL demodulator 56 demodulates binary data from thelevel slice detector 54 based on the 8-16 RLL code.

[0146] The AGC controller 57 corrects the signal of the AGC amplifier 51based on the equalized waveform from the equalizer 53.

[0147] The offset controller 58 outputs an offset value to the adder 52based on the equalized waveform from the equalizer 53.

[0148] The waveform slice system used as the signal processing system bythe level slice signal processing circuit 23 is explained with referenceto the operation waveform diagrams of FIGS. 15A to 15G.

[0149] As shown in FIG. 15C, a pit series is previously recorded on theoptical disk 1 according to the recording waveform of NRZI form shown inFIG. 15B and corresponding to recording data which is information to berecorded as shown in FIG. 15A.

[0150] When information thus recorded on the optical disk 1 isreproduced, a light beam for reproduction from a photo-diode in theoptical pickup section 22 is applied to the optical disk 1 as a finebeam spot as indicated by a hatched portion in FIG. 15C to read out thepit series and derive a reproducing signal.

[0151] The waveform (reproduced waveform) of the reproduction signal isnot obtained as a rectangular wave such as a recording waveform as shownin FIG. 15B because of the characteristic of the recording/reproducingsystem and is obtained as a dull waveform as shown in FIG. 15D.

[0152] Therefore, the reproduced waveform is subjected to waveformequalization in the equalizer 53 so that an intersection point betweenthe equalized waveform and a preset threshold level (indicated by adashed line) will be set at the center of the window. More specifically,the high frequency component of the reproduction signal is amplified.

[0153] As shown in FIG. 15F, the level slice detector 54 detects anintersection point between the equalized waveform and the thresholdlevel, and if the intersection point is detected in the window, itoutputs binary data “1”, and if the intersection point is not detectedin the window, it outputs binary data “0”.

[0154] Thus, the 8-16 RLL demodulator 56 demodulates the binary datafrom the level slice detector 54.

[0155] As shown in FIG. 14, the PRML signal processing circuit 24includes an AGC amplifier 61, adder 62, A/D converter 63, equalizer(linear equalizer) 64, ML decoder (Viterbi decoder) 65, 1,7 RLLdemodulator 66, PLL circuit 67, AGC controller 68 and offset controller69.

[0156] The AGC amplifier 61 corrects the level of a signal from thesignal detector 35 according to a control signal from the AGC controller68 and outputs the corrected signal to the adder 62. The adder 62 addsthe signal from the AGC amplifier 61 with an offset signal from theoffset controller 69 and outputs the result of addition to the A/Dconverter 63. The A/D converter 63 converts the signal from the adder 62into a digital signal of a discrete time and discrete amplitude seriesaccording to a channel clock from the PLL circuit 67 and outputs thedigital signal to the equalizer 64.

[0157] The equalizer 64 is constructed of a linear equalizer which isformed of an FIR filter (transversal filter), performs an equalizingprocess for the waveform (reproduced waveform) of the reproductionsignal from the A/D converter 63 into a waveform of PR(1,1)characteristic and outputs the equalized waveform to the ML decoder 65,PLL circuit 67, AGC controller 68 and offset controller 69.

[0158] The ML decoder 65 is constructed by a Viterbi decoder, decodesthe equalized waveform from the equalizer 64, detects the same as binarydata and outputs the binary data to the 1,7 RLL demodulator 66.

[0159] The 1,7 RLL demodulator 66 demodulates the decoded binary datafrom the ML decoder 65 based on the 1,7 RLL code.

[0160] The PLL circuit 67 generates a channel clock based on the signalfrom the equalizer 64 and outputs the channel clock to the A/D converter63. That is, it recovers the channel clock by converting a differencebetween the amplitude of the PR equalized waveform and an idealamplitude value into a phase difference.

[0161] The AGC controller 68 corrects the signal in the AGC amplifier 61based on the equalized waveform from the equalizer 64.

[0162] The offset controller 69 outputs an offset value to the adder 62based on the equalized waveform from the equalizer 64.

[0163] Next, the signal processing system by the PRML signal processingcircuit 24 is explained with reference to the waveform diagrams shown inFIGS. 16A to 16G.

[0164] A pit series is previously recorded on the optical disk 1 asshown in FIG. 16C according to the recording waveform of NRZI form shownin FIG. 16B and corresponding to recording data which is information tobe recorded as shown in FIG. 16A.

[0165] When information thus recorded on the optical disk 1 isreproduced, a light beam for reproduction from the photo-diode in theoptical pickup section 22 is applied to the optical disk 1 as a finebeam spot as indicated by a hatched portion in FIG. 16C to read out thepit series and derive a reproducing signal.

[0166] The waveform (reproduced waveform) of the reproducing signal isnot obtained as a rectangular wave such as a recording waveform as shownin FIG. 16B because of the characteristic of the recording/reproducingsystem and is obtained as a dull waveform as shown in FIG. 16D.

[0167] Waveforms obtained after subjecting the reproduced waveform ofFIG. 16D to waveform equalization based on the PR(1,1) characteristic,PR(1,2,1) characteristic and PR(1,2,2,1) characteristic in the equalizer64 are respectively shown in FIGS. 16E, 16F, 16G. The PR(1,1)characteristic is a characteristic in which an impulse response appearsat the rate of 1:1 at two successive identification points (=amplitudevalues of the reproduced waveform at two channel clock timings).

[0168] The recording waveform of NRZI form of FIG. 16B corresponding tothe first part “010010” of recording data of FIG. 16A is expressed asfollows.

011100

[0169] Since the reproduced waveform is regarded as being an impulseresponse to “1” of the recording waveform, the waveform of FIG. 16Eexpressed as linear superposition of the following responses andobtained as “012210” becomes a target waveform to be equalized as thePR(1,1) characteristic (class).

0110

00110

000110

[0170] The PR(1,2,1) characteristic is a characteristic in which animpulse response appears at the rate of 1:2:1 at three successiveidentification points. The PR(1,2,2,1) characteristic is acharacteristic in which an impulse response appears at the rate of1:2:2:1 at four successive identification points. As in the case of thePR(1,1) characteristic, to-be-equalized target waveforms derived bylinear superposition of impulse responses corresponding to the recordingwaveform become the waveforms as shown in FIGS. 16F, 16G (although notshown in the drawing, this is also applied to other PR characteristics).

[0171] As shown in FIGS. 16E, 16F, 16G, it is understood that thecharacteristic of the waveform after equalization becomes a dullercharacteristic in the order of PR(1,1) characteristic→PR(1,2,1)characteristic→PR(1,2,2,1) characteristic.

[0172] In the PRML system, an increase in the signal degrading componentin the equalizer 64 can be suppressed by equalizing the reproducedwaveform into a waveform of a PR characteristic which is closer to thecharacteristic of the reproduced waveform.

[0173] In the reproduction signal processing system of PRML system, aViterbi decoder which is a representative one of maximum likelihooddecoders is generally used as the ML decoder 65 arranged after theequalizer 64.

[0174] If the reproduced waveform is equalized into a waveform of thePR(1,2,2,1) characteristic by the equalizer 64, the ML decoder 65selects a series having the smallest error with respect to the sampleseries of the equalized waveform from all of the reproduced waveformseries which satisfy the PR(1,2,2,1) characteristic and estimates andoutputs recording data (binary data, decoded data) used as a source forgenerating the selected reproduced waveform series while tracing thestate transition.

[0175] The state is shown in FIGS. 17A to 17C. In the PRML system, sincethe decoding process is not effected based on one sample value but basedon a sequence using the correlation (waveform interference) due to thePR characteristic of a series of a plurality of sample values as apremise, the PRML system is highly resistant to the signal degradingcomponent having no correlation between sample values.

[0176] The signal determining circuit 25 determines whether a signal nowreproduced is a signal from the header field 3, 8 or a signal from therecording field 11 in which user data is recorded.

[0177] As shown in FIG. 13, the signal determining circuit 25 includes aband-pass filter (BPF) 71, comparator (Comp) 72 and re-triggerablemultivibrator 73. The re-triggerable multivibrator 73 is supplied with apower supply voltage via a circuit including resistors R1, R2 andcapacitor C.

[0178] The signal determining circuit 25 receives a signal from thesignal detector 35 of the optical pickup section 22 and makes thedetermination and outputs the result of determination to the drivecontrol circuit 26.

[0179] For example, in a case of groove 2 in which data is recorded inthe header field 3, 8 by use of pre-pits and the recording field 11 ofuser data is wobbled, if a signal [(Ia+Ib)−(Ic+Id)] of thephoto-detector 40 as shown in FIG. 13 is input to the signal detector 35shown in FIG. 13, a determination signal corresponding to the recordingfield 11 for recording user data can be obtained as shown by thewaveform of FIG. 18D, and therefore, the drive control circuit 26determines whether it is the recording field 11 or not based on thedetermination signal.

[0180] As shown in FIG. 18A, that is, the band-pass filter (BPF) 71outputs a waveform having an amplitude based on the wobbled groove 2 tothe comparator (Comp) 72. When the comparator (Comp) 72 is supplied withthe waveform of amplitude from the band-pass filter (BPF) 71, it outputsa pulse signal as shown in FIG. 18C to the re-triggerable multivibrator73 based on a comparison voltage V1 shown in FIG. 18B. There-triggerable multivibrator 73 outputs a determination signal as shownin FIG. 18D to the drive control circuit 26 based on the pulse signalfrom the comparator 72.

[0181] Thus, a convex portion of the wobble signal shown in FIG. 18A isdetected by the comparator 72 and a detection signal shown in FIG. 18Cis used as a trigger signal of the re-triggerable multivibrator 73, andan output of the re-triggerable multivibrator 73 is set at “1” as shownin FIG. 18D while the convex portion of the wobble signal is beingdetected.

[0182] The error correcting section 27 is constructed by an ECC decoder,corrects errors in the demodulated data from the 8-16 RLL demodulator 56of the level slice signal processing circuit 23 and outputs thecorrected data to the drive control circuit 26 as data of the headerfield 3, 8 or corrects an ECC error of demodulated data from the 1,7 RLLdemodulator 66 of the PRML signal processing circuit 24 and outputs thecorrected data to the host device interface 28 as reproducing data fromthe recoding field 11.

[0183] The host device interface 28 outputs reproduction data from theerror correcting section 27 to a host device (not shown), outputs aninstruction of recording or reproduction and the access position fromthe host device to the drive control circuit 26, or converts recordingdata from the host device into data of a data form having an errorcorrection code added thereto by an ECC encoder (not shown) and outputsthe converted data to the modulator 29.

[0184] The modulator 29 encodes data supplied from the host deviceinterface 28 into a 1,7 modulation code or data to be recorded on achannel and outputs the coded data to the write compensating circuit 30used as a recording compensator. The write compensating circuit 30converts an output waveform from the modulator 29 into an NRZI form andoutputs a write current waveform in which a deviation between the writewaveform and the mark form caused by conduction of heat of the opticaldisk 1 is compensated for to the write driver 31.

[0185] The drive control circuit 26 controls the whole portion of theoptical disk apparatus 21.

[0186] The drive control circuit 26 supplies a selection signal to thelevel slice signal processing circuit 23 or PRML signal processingcircuit 24 according to the determination signal from the signaldetermination circuit 25 and performs the control operation so that datanow produced can be adequately processed.

[0187] For example, the drive control circuit 26 outputs a selectionsignal to a changeover switch 59 of the level slice signal processingcircuit 23 to turn ON the changeover switch 59 so that demodulated datafrom the 8-16 RLL demodulator 56 can be output to the error correctingsection 27 via the changeover switch 59.

[0188] Further, the drive control circuit 26 outputs a selection signalto a changeover switch 70 of the PRML signal processing circuit 24 toturn ON the changeover switch 70 so that demodulated data from the 1,7RLL demodulator 66 can be output to the error correcting section 27 viathe changeover switch 70.

[0189] In addition, the drive control circuit 26 controls the servocontroller 32 based on address data including data from the errorcorrecting section 27 and instruction data from the host device so as tomove the light beam from the optical pickup section 22 to the accessposition and control the spindle motor 33 to rotate at a rotation speedof a zone corresponding to the access position.

[0190] Further, the drive control circuit 26 controls the write driver31 so as to control a semiconductor laser oscillator (not shown) basedon recording data from the write compensating circuit 30 to emit a lightbeam.

[0191] The drive control circuit 26 includes an AM detector 26 a, SYNCdetector 26 b and format controller 26 c.

[0192] The AM detector 26 a detects an address mark AM of the headerfield 3, 8 according to a demodulation signal from the 8-16 RLLdemodulator 56 based on the channel clock from the PLL circuit 55 of thelevel slice signal processing circuit 23.

[0193] For example, the Am detector includes a register in which thepattern of the address mark AM is stored, a register for recording ademodulation signal from the 8-16 RLL demodulator 56 based on thechannel clock from the PLL circuit 55 and a comparator for comparingregister data items in the two registers and outputs a detection signalof the address mark AM to the format controller 26 c when a coincidencesignal is output from the comparator.

[0194] The SYNC detector 26 b detects a SYNC code of the recording field11 according to a demodulation signal from the 1,7 RLL demodulator 66based on the channel clock from the PLL circuit 67 of the PRML signalprocessing circuit 24.

[0195] For example, the SYNC detector includes a register in which thepattern of the SYNC code is stored, a register for recording ademodulation signal from the 1,7 RLL demodulator 66 based on the channelclock from the PLL circuit 67 and a comparator for comparing registerdata items in the two registers and outputs a detection signal of theSYNC code to the format controller 26 c when a coincidence signal isoutput from the comparator.

[0196] The format controller 26 c determines a position illuminated onthe track by the laser light from the optical pickup section 22 andcontrols timings of the control signals output to the respectivesections by using the result of determination as a reference by countinga read clock, write clock or wobble clock while attainingsynchronization by use of a detection signal of the address mark AM fromthe AM detector 26 a and a detection signal of the SYNC code from theSYNC detector 26 b.

[0197] The read clock is a clock at the data reproducing (readout) time,the channel clock from the PLL circuit 55 is supplied to the formatcontroller 26 c when data of the header field 3, 8 is reproduced and thechannel clock from the PLL circuit 67 is supplied to the formatcontroller 26 c when data of the recording field 11 is reproduced.

[0198] The write clock is a clock generated based on a clock having apreset cycle from a clock generating section (not shown), that is, areference clock from an oscillator and supplied to the format controller26 c.

[0199] The wobble clock is a clock generated from a clock generatingsection (not shown) based on an output signal from the signal detector35 of the optical pickup section 22 and supplied to the formatcontroller 26 c.

[0200] That is, the format controller 26 c determines a positionilluminated on the track by the laser light from the optical pickupsection 22 and controls timings of the control signals output to therespective sections by using the result of determination as a referenceby counting the read clock or wobble clock while attainingsynchronization by use of a detection signal of the address mark AM ofthe header field 3, 8 and a detection signal of the SYNC code of therecording field 11 when data of the recording field 11 is read out.

[0201] Further, the format controller 26 c determines a positionilluminated on the track by the laser light from the optical pickupsection 22 and controls timings of the control signals output to therespective sections by using the result of determination as a referenceby counting the read clock or wobble clock while attainingsynchronization by use of a detection signal of the address mark AM ofthe header field 3, 8 when data of the recording field 11 is written andby counting the write clock or wobble clock in the recording field 11.

[0202] With the construction shown in FIGS. 13, 14, since data of theheader field 3, 8 is constructed by pre-pits, the write data modulator29 is only required to cope with a (1,7) RLL code used in the PRMLsystem of the recording field 11.

[0203] The signal processing system on the reproducing side isconstructed by two systems including a system for processing the headerfield 3, 8 according to the level slice system and a system forprocessing the recording field 11 for recording user data according tothe PRML signal processing system, but in the above embodiment, since an8-16 modulation code in which the minimum run length is 3 is used as themodulation code of the header field 3, 8, it becomes necessary toprovide the demodulator 56 for the 8-16 RLL modulation code in thesucceeding stage of the signal processing system of the level slicesystem. Further, since a (1,7) modulation code in which the minimum runlength is 1 is used as the modulation code of the recording field 11 forrecording user data, it becomes necessary to provide the demodulator 66for the (1,7) RLL modulation code in the succeeding stage of the signalprocessing system of the PRML system.

[0204]FIG. 19 is a diagram showing the construction of the linearequalizer (PR equalizer) 64 and ML decoder (Viterbi decoder, MLdetector) 65 which are the main portions of the PRML signal processingcircuit 24.

[0205] The ML decoder 65 selects a series having the smallest error withrespect to the sample series of the equalized waveform and outputsbinary data (decoded data) corresponding to the selected series.

[0206] That is, as shown in FIGS. 17A to 17C, in a case where the signalwaveform series obtained after PR(1,2,2,1) equalization is given asfollows,

01355311356531 . . .

[0207] impulse responses for a candidate of recorded data (01010 . . . )(the recorded waveform is 01100 . . . ) are given as follows.

012210 . . .

001221 . . .

[0208] Then, the reproduced waveform of an ideal PR characteristicobtained by linear superposition of the above impulse responses isobtained as follows.

013431 . . .

[0209] Further, impulse responses for a candidate of another recordeddata (01110 . . . ) (the recorded waveform is 01110. . . ) are given asfollows.

0122100 . . .

0012210 . . .

0001221 . . .

[0210] Then, the reproduced waveform of the ideal PR characteristicobtained by linear superposition of the above impulse responses isobtained as follows.

0135531 . . .

[0211] After this, the cross-correlations with respect to the waveformseries of the above reproduced waveforms are calculated and a serieshaving the highest correlation (=the smallest error between the series)with respect to the reproduced equalized waveform is selected by aprobabilistic method.

[0212] The number of candidates of the waveform can be increased andcounted up as in a tree structure but the number of available states islimited when taking the PR characteristic into consideration. In thecase of the PR(1,2,2,1) characteristic, the constraint length (the rangewhich the waveform interference gives an influence) is “4”, andvariations of recording data series caused by the waveform interferenceoccur in 16 combinations of four-digit values constructed by two typesof data values of “0” and “1”, and therefore, the state number having noredundancy is 16 at maximum. There is a possibility that the statenumber will be reduced if the modulation code is limited.

[0213] The ML decoder 65 calculates the probability according to aninput sample value when it is assumed that the state is transited from acertain state to a next state. When a plurality of candidates of thewaveform series transited to the same state are provided, a probable oneof the candidates is determined based on the accumulated value of thepast transition probability.

[0214] For this purpose, a pass memory 65 d for storing candidates ofthe waveform series is provided in the ML decoder 65. Generally, thelength thereof is set to a length of several ten channel bits. Aplurality of candidates of the waveform series are transited to the samestate while they pass through the pass memory 65 d, then the candidatesare repeatedly selected and the most probable series is finallyselected.

[0215] A branch metric calculating section 65 a calculates a logarithmvalue of the probability of transition of the state which is expressedin terms of a difference between actual amplitude and ideal amplitudeobtained if it is assumed that the state is transited from a certainstate to a next candidate state when a sample value is input. A passmetric memory 65 c is a memory for storing a past branch metricaccumulated value obtained until the state transition for each of thestates of the state number is repeatedly effected and the state isattained.

[0216] An ACS 65 b is the abbreviated name of a circuit for performingthe Add (addition), Compare (comparing) and Selection (selecting)operations. As shown in FIG. 20, it is assumed that the pass metricvalues of the states A and B at time 1 are respectively set at “5” and“8”, the branch metric caused for transition from the state A (at time1) to the state A at time 2 is “4”, the branch metric caused fortransition from the state A (at time 1) to the state B is “5”, thebranch metric caused for transition from the state B (at time 1) to thestate A is “2”, and the branch metric caused for transition from thestate B (at time 1) to the state B is “5”.

[0217] In the ACS 65 b, a value “9” obtained by adding the pass metricvalue “5” of the state A at time 1 with the branch metric “4” caused fortransition from the state A (at time 1) to the state A (at time 2) and avalue “10” obtained by adding the pass metric value “8” of the state Bat time 1 with the branch metric “2” caused for transition from thestate B (at time 1) to the state A (at time 2) are compared with eachother and transition from the state B (at time 1) to the state B (attime 2) corresponding to the larger value is selected (in practice,since the metric value is diverged if a larger value is selected, acircuit for making a calculation in which the metric value correspondingto a higher probability takes a smaller value by properly dealing withthe equations and selecting a smaller metric value is mounted in manycases). Likewise, a value “10” obtained by adding the pass metric value“5” of the state A at time 1 with the branch metric “5” caused fortransition from the state A (at time 1) to the state B (at time 2) and avalue “13” obtained by adding the pass metric value “8” of the state Bat time 1 with the branch metric “5” caused for transition from thestate B (at time 1) to the state B (at time 2) are compared with eachother and transition from the state B (at time 1) to the state B (attime 2) corresponding to the larger value is selected. In this case,since it is only the state B of time 1 that has been transited to eachof the states of time 2, the waveform series which is set to the state Aat time 1 is eliminated from the candidate to be selected. The passmemory 65 d is a memory for recording series (=pass) remaining asselected candidates. Generally, only one candidate of the series is leftbehind by the time the candidate passes through the pass memory 65 d,but a plurality of series may remain as candidates depending on thenoise condition, and in this case, the series which is determined as themost probable candidate is selected by comparing the contents of thepass memory 65 d and the pass metric of the pass metric memory 65 c byuse of the pass selecting section 65 e.

[0218] Since the series is selected and detection data is determinedafter the series has passed through the pass memory 65 d, an output ofthe ML decoder 65 is more delayed than in a case of the conventionaldata detector of a waveform slice system.

[0219] In the above embodiment, data of the header field 3, 8 isdetected by the level slice system having less detection delay and dataof the recording field 11 for recording user data is detected by thePRML system capable of attaining the high recording density. In the caseof the PRML system, a system such as the 1,7 modulation code in whichthe code rate can be made high and the channel band can be suppressed toa low level is used.

[0220] The 1,7 modulation code is a conversion system for conversion toa code in which the code rate is 2/3, the minimum run length (=dconstraint) indicating the minimum number of “0s” lying between “1” and“1” of the data series is “1”, and the maximum run length (=kconstraint) indicating the maximum number of “0s” lying between “1” and“1” of the data series is “7”.

[0221] As the modulation code adequately applied to the PRML system andhaving the code rate of 2/3 (2 to 3, conversion of 2-bit data to 3bits), an 8-12 modulation code having the d constraint of 1 is providedin addition to the 1,7 modulation code.

[0222] On the other hand, in the case of the level slice system, asystem such as a 2,7 modulation code in which the code rate is low, butthe minimum run length can be set large is preferable. The 2,7modulation code is a conversion system for conversion to a code in whichthe code rate is 1/2, the minimum run length (=d constraint) indicatingthe minimum number of “0s” lying between “1” and “1” of the data seriesis “2”, and the maximum run length (=k constraint) indicating themaximum number of “0s” lying between “1” and “1” of the data series is“7”. As the modulation code adequately applied to the level slice systemand having the minimum run length (=d constraint) of “2”, an 8-16modulation code having the code rate of 8/16 and an 8-15 modulation codehaving the code rate of 8/15 are provided in addition to the 2,7modulation code.

[0223] The reason why the system in which the minimum run length can beset to a large value can be adequately used for the level slice systemis that it is important that the linear convolution is established evenwhen the minimum mark/pit amplitude value is small in the case of PRMLsystem, but it is impossible to slice the amplitude if the minimummark/pit amplitude value is not larger than a certain value in the caseof level slice system.

[0224] The 1,7 modulation code is a modulation code in which the coderate is 2/3, the d constraint is “1” and the k constraint is “7”. Asshown in FIG. 21A, the d constraint of “1” indicates that the constraintis set so as to provide at lest one “0” between “1”and “1” of the codeafter modulation. The k constraint of “7” indicates that the constraintis set so as to provide seven “0s” at most between “1” and “1” of thecode after modulation. Since the modulated code is recorded in the NRZIform (FIG. 213) when it is recorded on the optical disk 1, the minimumpit/mark length is set to the length of two channel clocks period andthe maximum pit/mark length is set to the length of eight channel clocksperiod.

[0225] The 8-16 modulation code used in the DVD is a modulation code inwhich the code rate is 1/2, the d constraint is “2” and the k constraintis “10”. Therefore, when the code is recorded on the recording medium,the minimum pit/mark length is set to the length of three channel clocksperiod and the maximum pit/mark length is set to the length of elevenchannel clocks period. Like the 8-16 modulation code, in the 8-15modulation code, the d constraint is “2” and the minimum pit/mark lengthis set to the length of three channel clocks period.

[0226] If the same user data recording density is set for the 1,7modulation code and 8-16 modulation code, 2-bit user data is convertedinto a 3-bit code in the 1,7 modulation code and 2-bit user data isconverted into a 4-bit code in the 8-16 modulation code, and therefore,the length of one channel clock in the 8-16 modulation code becomes ¾times that of the 1,7 modulation code. However, since the minimumpit/mark length of the 8-16 modulation code is set to the length ofthree channel clocks period and the minimum pit/mark length of the 1,7modulation code is set to the length of two channel clocks period, theresult of (¾×{fraction (3/2)}={fraction (9/8)}) is obtained. Thus, it isunderstood that the 8-16 modulation code has a slightly larger bitlength and is more suitably used for the level slice system. Therefore,in order to use the level slice system having less detection delay forthe header field 3, 8, it is required to make the recording density inthe linear direction of information recorded in the header field 3, 8lower than the recording density in the linear direction of informationrecorded in the user data recording field 11.

[0227] In the above example, a case wherein the 8-16 modulation code isused for the header field 3, 8 and the 1,7 modulation code is used forthe user data recording field 11 is explained as a code selectionexample based on the reality, but the same modulation code can be usedfor the header field 3, 8 and the user data recording field 11 incertain cases. Also, in this case, since it is impossible to operate thelevel slice system at the same amplitude value as the PRML system withthe recording density at which the PRML system can be used for the userdata recording field 11, it becomes necessary to lower the recordingdensity in the linear direction of the header field 3, 8 and elongatethe pit/mark length to attain a large amplitude value.

[0228] As an example of a method for using the same modulation code forthe header field 3, 8 and user data recording field 11 and lowering therecording density in the linear direction of the header field 3, 8 toelongate the pit length or mark length and attain a large amplitudevalue, a method for writing data in which a code of the minimum pitlength does not appear into the header field 3, 8 is provided.

[0229] The advantage of this method is that the channel clock ratebecomes the same in the header field 3, 8 and user data recording field11 although the physical pit recording density is lowered. Therefore, itbecomes unnecessary to separate the PLL for clock recovery for theheader field 3, 8 and the PLL for clock recovery for the user datarecording field 11. Further, since the modulation code is the same, thedemodulator can be commonly used.

[0230] In a recording/reproducing optical disk apparatus using a pre-pitheader for the header field 3, 8, there is a large difference betweenthe level of a signal from the mark of the user data recording field 11and the level of a signal from the pit of the header field 3, 8. Sincethe PRML signal processing system is a system for detecting an amplitudevalue at an identification point synchronized with the channel clock, ittends to be influenced by a level variation. Of course, a correction forlevel difference between the header field 3, 8 and the user datarecording field 11 is made by use of an AGC, but it is difficult tocompletely eliminate the influence by the previously used level at thechangeover time if the detection system utilizes the same PRML signalprocessing system.

[0231] Since it is necessary to make the GAP field for changeover largein order to almost completely eliminate the influence, the formatefficiency is lowered. If the conventional level slice system is appliedto the ID section of the recording/reproduction optical disk apparatususing the pre-pit header, it is expected that the above problem can besolved.

[0232] As shown in FIGS. 22A to 22C, data is recorded in the headerfield 3, 8 by use of a modulation code having the minimum pit (mark)length of three channel bits and, as shown in FIGS. 22D to 22F, data isrecorded in the recording field 11 by use of a modulation code havingthe minimum pit (mark) length of two channel bits.

[0233] That is, FIGS. 22A to 22C show the relation between the channelbit pattern (FIG. 22A), write current waveform (FIG. 22B) andto-be-written pit (mark) (FIG. 22C) in the case of the minimum pit inthe (1,7) modulation code.

[0234]FIGS. 22D to 22F show the relation between the channel bit pattern(FIG. 22D), write current waveform (FIG. 22E) and to-be-written pit(mark) (FIG. 22F) in the case of the minimum pit in the 8-16 modulationcode.

[0235] In a modulation code such as the 8-16 modulation code shown inFIGS. 22D to 22F in which the code rate is low, the clock frequencybecomes high and the width of the data detection window becomes narroweven if the minimum pit/mark length is large.

[0236] As for the conversion ratio in the case of 8-16 modulation,one-bit user data is converted into a 2-bit channel bit pattern from theviewpoint of ratio, and in the case of (1,7) modulation in which thecode rate is higher, 2-bit user data is converted into a 3-bit channelbit pattern.

[0237] Therefore, as indicated by the relationship shown in FIGS. 22A to22C and FIGS. 22D to 22F, even if the minimum pit (mark) length islarger in the 8-16 modulation and the amplitude can be made larger thanin the (1,7) modulation accordingly, the window width is shorter in the8-16 modulation than in the (1,7) modulation and it becomes moredifficult to control the rise and fall positions of the waveform.

[0238] If the recording density is enhanced, it is advantageous to usethe mark edge form in which information can be recorded on both edges ina condition that the recording density is restricted by the minimumpit/mark length, but if an attempt is made to attain a sufficientlylarge margin by lowering the recording density, it is expected that thereliability can be enhanced by using a mark position form in whichinformation is recorded only in the mark position and simplifying theconstruction of the data recording and reproducing means.

[0239] That is, pre-pits are formed in the header field 3, 8 by therecording method of the mark position form and recording marks arewritten into the user data recording field 11 by the recording method ofthe mark edge form.

[0240] As shown in FIG. 2, in the case of the groove recording system,the groove is interrupted (temporarily terminated) in a portion of thepre-pit header of the header field 3 in some cases.

[0241] Further, as shown in FIG. 4, in the case of the groove/landrecording system, the groove is interrupted in a portion of the pre-pitheader of the header field 8 in some cases.

[0242] That is, in the case of a wobble groove system for wobbling thegroove in the radial direction, timing is generated by use of a clocksynchronized with wobbling. Therefore, if a deviation occurs withrespect to the phase of the clock before the wobble groove isinterrupted and after the wobble groove is re-started, the PLL pull-inprocess becomes necessary and stability cannot be maintained.

[0243] Therefore, even when the recording density and minimum pit/marklength are changed for the header field 3, 8 and the recording field 11,the length of the to-be-interrupted groove of the header field 3, 8 isset to the integral multiple of the groove cycle. Alternatively, thephase of the amplitude at timing when the wobble groove is re-startedafter the header field 3, 8 is set to a value which can be derived basedon the phase at the end time of the wobble groove and the interruptiontime length by the header field 3, 8.

[0244] That is, an output of a phase difference detection circuit (notshown) of the PLL circuits 55, 67 synchronized with the wobble signalbefore interruption of the wobble groove is set to have such a phasethat a large phase difference will not be detected when the wobblesignal is input after interruption.

[0245] If the recording density is lowered (coarse) to make the pit/marklength large, a sufficiently large amplitude value can be surelyobtained, but in the case of level slice system, the detection windowwidth is important as well as the amplitude value.

[0246] In a DVD, the pit/mark recording system on the optical disk 1 isa mark edge form in which information is recorded in rise and fallpositions of the waveform. As shown in FIG. 22B, in the modulation codesuch as the 8-16 modulation code in which the code rate is low, theclock frequency becomes high and the data detecting window width becomesnarrow even if the minimum pit/mark length is large. That is, it isdifficult to control the rise and fall positions of the waveform. If therecording density is enhanced (dense), it is advantageous to use themark edge form in which information can be recorded on both ends in acondition that the recording density is restricted by the minimumpit/mark length. However, if an attempt is made to attain a sufficientlylarge margin by lowering the recording density, it is expected that thereliability can be enhanced by using a mark position form in whichinformation is recorded only in the mark position and simplifying theconstruction of the data recording and reproducing means.

[0247] That is, as shown in FIGS. 2, 4, pre-pits are formed in theheader field 3, 8 by the recording method of the mark position form andrecording marks are written into the user data recording field 11 by therecording method of the mark edge form.

[0248] Next, with the above construction, the data recording process anddata reproduction process in the optical disk apparatus 21 are explainedwith reference to the flowchart shown in FIG. 23.

[0249] Immediately after the seeking operation of the optical pickupsection 22 is completed or, when the format controller 26 c deviatesfrom the tracing path by a disturbance or the like, that is, when theformat controller 26 c cannot grasp the position on the track, thefollowing control process is effected.

[0250] That is, the signal determining circuit 25 checks the signallevel of a signal supplied from the optical pickup section 22 (ST1) anddetermines whether or not it is the recording field 11 for recordinguser data (ST2).

[0251] AS the result of determination, if the signal determining circuit25 determines that it is the user data recording field 11, the circuit25 outputs a signal indicating the user data recording field 11 to thedrive control circuit 26 (ST3).

[0252] Then, the drive control circuit 26 outputs a selection signal tothe PRML signal processing circuit 24 (ST4).

[0253] In step ST2, if the signal determining circuit 25 does notdetermine the user data recording field 11, it outputs a signalindicating the header field 3, 8 to the drive control circuit 26 (ST5).

[0254] Then, the drive control circuit 26 outputs a selection signal tothe level slice signal processing circuit 23 (ST6).

[0255] While the PRML signal processing circuit 24 or level slice signalprocessing circuit 23 is being selected by the selection signal obtainedin step ST4 or ST6, the drive control circuit 26 establishessynchronization of the format controller 26 c and records data orreproduces recorded data based on data from the signal processing systemproperly selected for each field (ST7).

[0256] At the start of correct data reproduction, the format controller26 c can grasp the position on the track and the determination result ofthe signal determining circuit 25 is used no more.

[0257] In the above embodiment, a case wherein the signal determiningcircuit 25 is provided in the succeeding stage of the optical pickupsection 22 is explained, but this is not limitative and, as shown inFIG. 24, a case wherein a signal determining circuit 36 is provided inthe succeeding stage of the error correcting section 27 can be realizedin the same manner. Portions which are the same as those of FIG. 12 aredenoted by the same reference numerals and an explanation thereof isomitted.

[0258] In the signal determining circuit 36, whether the signal nowreproduced is a signal from the header field 3, 8 or a signal from theuser data recording field 11 is determined based on whether data issignificant or not. In order to determine whether the signal nowreproduced is a signal from the header field 3, 8 or a signal from theuser data recording field 11, an attempt is made to read out data on theassumption that one of the fields is temporarily determined in theinitial condition. When a signal is determined to be output from thetemporarily determined field, significant data such as the sync codeportion VFO, address mark AM can be obtained and the position in thetemporarily determined field is detected at this time point.

[0259] In the case of a rewriting type, since no data is written in theuser data recording field 11 in some cases, it is preferable to searchfor significant data on the assumption that the header field 3, 8 istemporarily determined.

[0260] In this case, the signal determining circuit 36 determineswhether data can be read out from the header field 3, 8 based on anoutput from the error correcting section 27 which is based on an outputof the level slice signal processing circuit 23 for processing thesignal from the optical pickup section 22 and determines that the fieldis the header field 3, 8 when data of the header field 3, 8 can be readout.

[0261] With the above construction, the data recording process and datareproduction process in the optical disk apparatus 21 are explained withreference to the flowchart shown in FIG. 25.

[0262] Immediately after the seeking operation by the optical pickupsection 22 or when the format controller 26 c deviates from the tracingpath by a disturbance or the like, that is, when the format controller26 c cannot grasp the position on the track, the following controlprocess is effected.

[0263] That is, the signal determining circuit 36 outputs a signalindicating the header field 3, 8 to the drive control circuit 26 (ST1).

[0264] Then, the drive control circuit 26 outputs a selection signal tothe level slice signal processing circuit 23 (ST12).

[0265] Thus, a signal from the level slice signal processing circuit 23is supplied to the signal determining circuit 36 via the errorcorrecting circuit 27.

[0266] As a result, the signal determining circuit 36 determines whethersignificant data such as the sync. code portion VFO, address mark AM canbe obtained or not (ST13).

[0267] Then, the signal determining circuit 36 outputs a signalindicating the header field 3, 8 to the drive control circuit 26 whensignificant data is obtained (ST14).

[0268] Then, the drive control circuit 26 sets up synchronization of theformat controller 26 c and records data or reproduces recorded databased on data from the signal processing circuit properly selected foreach field (ST15).

[0269] At the start of correct data reproduction, the format controller26 c can grasp the position on the track and the determination result ofthe signal determining circuit 25 is used no more.

[0270] Next, another embodiment is explained with reference to FIGS. 26,27. In this case, portions which are the same as those of FIGS. 12, 14are denoted by the same reference numerals and an explanation thereof isomitted.

[0271] In this embodiment, one example of the construction of theoptical disk apparatus 21 is shown in a case where the recording densityof the header field 3, 8 in the linear direction is lowered (coarse) andthe pit/mark length is made large to make an amplitude value large byusing the same modulation code for the header field 3, 8 and user datarecording field 11 and writing data having no code with the minimum pitlength into the header field 3, 8.

[0272] The signal processing system on the reproducing side isconstructed by two systems including a system (level slice signalprocessing circuit 23′) for processing the header field 3, 8 accordingto the level slice system to detect channel data and a system (PRMLsignal processing circuit 24′) for processing the user data recordingfield 11 according to the PRML signal processing system to detectchannel data.

[0273] In the case of FIG. 27, the level slice signal processing circuit23′ is constructed by removing the PLL circuit 55 and 8-16 RLLdemodulator 56 from the level slice signal processing circuit 23 shownin FIG. 14 and the PRML signal processing circuit 24′ is constructed byremoving the PLL circuit 67 and 1,7 RLL demodulator 66 from the PRMLsignal processing circuit 24 shown in FIG. 14.

[0274] In the case of FIG. 26, a PLL circuit 37 and demodulator 38 whichare commonly used by the level slice signal processing circuit 23′ andPRML signal processing circuit 24′ are provided.

[0275] Further, the drive control circuit 26 supplies a selection signalto the level slice signal processing circuit 23′ or PRML signalprocessing circuit 24′according to a determination signal from thesignal determining circuit 25 to perform the control operation so thatdata now reproduced can be properly processed.

[0276] At this time, the drive control circuit 26 supplies a changeoversignal for a phase difference detecting system to a phase differencedetecting circuit 37 a in the PLL circuit 37 according to adetermination signal from the signal determining circuit 25 to performthe control operation so that data now reproduced can be properlyprocessed. Thus, the phase difference detecting circuit 37 a in the PLLcircuit 37 generates a clock for reproduction while a phase differenceis detected by a phase difference detecting system (detection of a phasedifference by the level slice system or detection of a phase differenceby the PRML system) suitably selected for the level slice signalprocessing circuit 23′ or PRML signal processing circuit 24′.

[0277] As a result, after channel data is detected, the data isdemodulated by the common demodulator 38.

[0278] Next, with the above construction, the data recording process anddata reproduction process in the optical disk apparatus 21 are explainedwith reference to the flowchart shown in FIG. 28.

[0279] Immediately after the seeking operation of the optical pickupsection 22 or when the format controller 26 c deviates from the tracingpath by a disturbance or the like, that is, when the format controller26 c cannot grasp the position on the track, the following controlprocess is effected.

[0280] That is, the signal determining circuit 25 checks the signallevel of a signal supplied from the optical pickup section 22 (ST1) anddetermines whether or not it is the recording field 11 for recordinguser data (ST2).

[0281] As a result of determination, if the signal determining circuit25 determines that it is the user data recording field 11, the circuit25 outputs a signal indicating the user data recording field 11 to thedrive control circuit 26 (ST3).

[0282] Then, the drive control circuit 26 outputs a selection signal tothe PRML signal processing circuit 24′ and phase difference detectingcircuit 37 a (ST4′).

[0283] In step ST2, if the signal determining circuit 25 does notdetermine the user data recording field 11, it outputs a signalindicating the header field 3, 8 to the drive control circuit 26 (ST5).

[0284] Then, the drive control circuit 26 outputs a selection signal tothe level slice signal processing circuit 23 and phase differencedetecting circuit 37 a (ST6′).

[0285] While the PRML signal processing circuit 24 or level slice signalprocessing circuit 23 is being selected by the selection signal obtainedin step ST4′ or ST6′, the drive control circuit 26 sets upsynchronization of the format controller 26 c and records data orreproduces recorded data based on data from the signal processing systemproperly selected for each field (ST7).

[0286] When data starts to be correctly reproduced, the formatcontroller 26 c can grasp the position on the track and thedetermination result of the signal determining circuit 25 is used nomore.

[0287] Next, another embodiment is explained with reference to FIG. 29.In the above embodiment, the header field 3, 8 is constructed by fourheader fields and only one address mark AM is provided before theaddress portion PID in each of the header fields, but this is notlimitative and, in another embodiment, a plurality of address marks AMcan be provided in one header field.

[0288] The layout of a header field 71 is shown in FIG. 29. In theformat of the header field 3, 8, four header fields are provided, but inthis example, it is assumed that only one header field 71 is providedfor simplicity, but this does not limit the number of header fields 71.

[0289] The header field 71 has a significant feature in that AM (addressmark) patterns for detecting divisions between data items are recordedin a plurality of portions of the same header field 71.

[0290] The header field 71 is constructed of 49 bytes and includes a36-byte sync code portion VFO (Variable Frequency Oscillator), 3-byteaddress mark AM, 4-byte address portion PID (Position Identifier),2-byte error detection code IED (ID Error Detection Code), one-byte postamble PA and 3-byte address mark AM arranged in this order from the leftside.

[0291] With the above construction, the reliability at the time ofreproduction of information recorded in the header field 71 can besignificantly enhanced. That is, as shown in FIG. 29, in thisembodiment, the address marks AM for attaining data byte synchronizationare respectively provided before the address portion PID and after thepost amble PA.

[0292] Generally, synchronization is attained by use of the address markAM provided before the address portion PID to take out succeedingindividual information items and, if no error is detected by the errordetection code, it is supposed that correct sector information andsector number can be obtained.

[0293] In this embodiment, even if an error is detected by use of theerror detection code, correct sector information and sector number canbe obtained by use of the following means in a case where the detectionerror is caused only by use of the address mark AM provided before theaddress portion PID. Since the address mark AM provided before theaddress portion PID is placed in position immediately after the synccode portion VFO, a detection error tends to occur when the pull-inprocess of the PLL is delayed by a disturbance. However, even in such acase, data after the address portion PID is correctly read out in somecases.

[0294] Next, an ID detecting circuit 80 for detecting the addressportion PID in a case where one header field 71 has two address marks AMis explained with reference to FIGS. 30, 31.

[0295]FIG. 30 shows the circuit construction of the ID detecting circuit80 and FIG. 31 is a circuit construction diagram of the optical diskapparatus 21 having the ID detecting circuit 80 mounted thereon. In thecase of FIG. 31, portions which are the same as those of FIGS. 12, 14are denoted by the same reference numerals and an explanation thereof isomitted. However, it should be noted that the changeover switches 59 inthe signal determining circuit 25 and level slice signal processingcircuit 23 and the changeover switch 70 in the PRML signal processingcircuit 24 are omitted.

[0296] As shown in FIG. 31, the ID detecting circuit 80 is provided inthe succeeding stage of the 8-16 RLL demodulator 56 which is the laststage of the level slice signal processing circuit 23 for processing thesignal from the header field, detects ID information based on binarydata decoded by the 8-16 RLL demodulator 56 and the channel clock fromthe PLL circuit 55 and outputs the detected ID information to the drivecontrol circuit 26.

[0297] As shown in FIG. 30, the ID detecting circuit 80 includes a shiftregister 81, address mark detector (AM detector) 82, counter 83, IDinformation detector 84, stack register 85, changeover switches 86 a, 86b and stack counter 87.

[0298] The shift register 81 is supplied with channel bit data as binarydata decoded by the 8-16 RLL demodulator 56 at an input terminal 81 aand shifts the channel bit data for each bit to the left direction inthe drawing in synchronism with the channel clock. The shift register 81is required to have at least the length capable of receiving all of thedata of the header field 71 and is required to have a margin so as tosave data for recovery when the first address mark AM fails to bedetected and store the whole data even if the data is shifted due to theoccurrence of an error. For example, the shift register has a margin ofseveral bytes to several tens of bytes in addition to the data number of49 bytes of the header field 71.

[0299] The AM detector 82 detects an address mark AM based on thecoincidence between AM patterns.

[0300] The counter 83 notifies that one-byte data is taken out andsupplied to the ID information detector 84 for every 16 bits.

[0301] The ID information detector 84 recovers sector information andsector number from the readout channel bit pattern and detects an error.

[0302] Further, the ID information detector 84 outputs an instruction tothe AM detector 82 again to detect the address mark AM when the errordetection code IED reading operation is ended so as to make ready for acase wherein an error occurs.

[0303] The stack register 85 stacks a lower 16-bit channel data patternof the shift register 81 supplied via the switch 86 a.

[0304] The changeover switches 86 a, 86 b are set on a node 86 d sidewhen the top of the stacked data becomes the head address of the addressportion PID and puts the contents of the stack register 85 into the IDinformation detector 84.

[0305] The stack counter 87 counts the bytes (=16 channel bits) afterthe shift register starts to reverse the shifting direction and detectsthe depth of the stacked data until the top of the stacked data becomesthe head address of the address portion PID.

[0306] With the above construction, the detection process of the IDdetecting circuit 80 is explained with reference to the flowchart shownin FIG. 33.

[0307] A signal for starting detection of the address mark AM issupplied from the format controller 26 c to the AM detector 82approximately at a time point when the header field is subjected to theread process and the PLL operation starts to be converged according tothe VFO pattern. At the same time, data of the ID field starts to beinput to the input terminal 81 a of the shift register 81 (ST21). Thus,readout channel bit data is input to the shift register 81 via the inputterminal 81 a and shifted for each bit to the left direction in FIG. 33in synchronism with the channel clock.

[0308] In this case, it is assumed that data has been subjected to 8-16modulation in the header field 3, 8, for example. Since the address markAM is 3 bytes, it is 48 bits in the channel code.

[0309] When coincidence of the 48-bit pattern is detected in the AMdetector 82, the AM pattern is detected (ST22) and an enable signal isoutput to the counter 83 via a signal line 88. As a result, the counter83 is set into the enable state and starts to count the channel clock.Since one-byte data corresponds to a 16-bit code on the channel, thecounter 83 informs the ID information detector 84 that one-byte data istaken out for every 16 bits.

[0310] At this time, the changeover switches 86 a, 86 b are set on thenode 86 c side to permit lower 16-bit data of the shift register 81 tobe input as it is to the ID information detector 84 (ST23).

[0311] The ID information detector 84 recovers the sector informationand sector number from the readout channel bit pattern and detects anerror (ST24). If no error is detected, a process for starting access tothe sector or a process for making preparation for detection of the nextsector is performed by the same operation as in the conventional case(ST25).

[0312] When detecting the address mark AM provided after the post amblePA, the AM detector 82 resets the counter 83 by use of a signal suppliedvia the signal line 88, and at the same time, reverses the shiftingdirection of the shift register 81 by use of the signal from the signalline 89. The counter 83 re-starts to count the channel clock andsupplies a latch signal to the stack register 85 for every 16 bits.

[0313] As a result, the lower 16-bit channel data pattern of the shiftregister 81 is pushed into the stack register 85 via the switch 86 a.When the shifting direction of the shift register 81 starts to bereversed, the switch 86 a is set on the node 86 d side to permit lower16-bit data of the shift register 81 to be supplied to the stackregister 85.

[0314] The stack counter 87 counts bytes (=16 channel bits) after theshifting direction of the shift register 81 starts to be reversed anddetects the depth of the stacked data until the top of the stacked databecomes the head address of the address portion PID. When the top of thestacked data becomes the head address of the address portion PID, theswitches 86 a, 86 b are set on the node 86 d side so as to put thecontents of the stack register 85 into the ID information detector 84(ST27).

[0315] The ID information detector 84 recovers sector information andsector number from the readout channel bit pattern and detects an error(ST28).

[0316] If no error is detected, a process for starting access to thesector or a process for making preparation for detection of the nextsector is performed by use of the above information by the sameoperation as in the conventional case.

[0317] Since the operation after the shifting direction of the siftregister 81 is reversed is a retrial operation using the address mark AMprovided in the rear portion when an error occurs in the first IDdetection process, the operation can be stopped at any point in time ifthe first ID detection process is successfully effected.

[0318] In this embodiment, the other address mark AM is provided afterthe error detection code IED. Therefore, the ID information detector 84outputs an instruction to the AM detector 82 again to detect the addressmark AM when the error detection code IED reading operation is ended soas to make ready for a case wherein an error occurs. As shown in thesteps ST31 to ST33 of FIG. 33, it is possible to detect the otheraddress mark Am before the error detection result is determined bytaking the detection time of the error detection code IED intoconsideration.

[0319] In the above embodiment, the address marks AM are distributed andarranged in two portions of the same header field, but this is notlimitative and the same operation can be attained even if address marksAM are distributed and arranged in three or more portions of the sameheader field.

[0320] Next, another embodiment in which the contents of the headerfield are changed depending on the sector is explained. Generally, whenthe recording density in the header field is lowered, the header fieldis made longer if the amount of ID information is not reduced, but inthis embodiment, an increase in the length of the header field issuppressed by reducing an amount of ID information in the header fieldfor each sector.

[0321] As one example, one ECC block is constructed by 16 2-kilobytesectors in the optical disk 1 used for a DVD as shown in FIG. 8, but inthis case, ID information (refer to FIG. 29) identical to that in theconventional case is recorded in the header field 3, 8 of the headsector of the ECC block and only the sector number or track number isrecorded in the header field 3, 8 of the other sectors.

[0322] As another example, if ID information is constructed by fourbytes as shown in FIG. 34, the amount of ID information is reduced byrecording the least significant one byte in the header field of eachsector and distributing and recording the remaining three bytes in therespective sectors.

[0323] A more specific example is shown in FIG. 35. A header field ofthe conventional form in which ID information is constructed by fourbytes of ID information 1 to ID information 4, the contents of the IDinformation 1 is “00010100”, the contents of the ID information 2 is“11001001”, the contents of the ID information 3 is “00111101” and thecontents of the ID information 4 is “01100001” is considered and anexample of ID information of a form based on this embodiment andcorresponding to the above form is shown.

[0324] It is supposed that three successive sectors each having a headerfield to which the ID information of this embodiment is applied areprovided. In the header field of the first sector, only the IDinformation 1 and ID information 4 of the header of the conventionalform are recorded. That is, the contents of binary data recorded in theheader field become “00010100”+“01100001”. Only binary data obtained byincrementing the contents of the ID information 4 by one and the IDinformation 2 of the header of the conventional form are recorded in theheader of the second sector.

[0325] That is, the contents of the binary data recorded in the headerfield become “11001001”+“01100010”. The reason why the contents of thesecond byte become a value obtained by incrementing the contents of theID information 4 of the header field of the conventional form by one isthat the ID information 4 is supposed to be the least significant byteof the sector number and the sector number is incremented by one. onlybinary data obtained by incrementing the contents of the ID information4 by two and the ID information 3 of the header of the conventional formare recorded in the header of the third sector. That is, the contents ofbinary data recorded in the header field become “00111101”+“01100011”.

[0326] In this embodiment, since the whole portion of the ID informationcannot be obtained simply by reading one header field, it takes a longtime to obtain a correct sector number (block number), for example.However, in a conventional ID information recording method, when accessis made to a large number of successive header fields, the amount ofinformation in a redundant portion and readout time of the header fieldbecome useless since most of the ID information is not so different inthe adjacent header fields.

[0327] In this embodiment, information which varies for each headerfield is recorded in each header field and information of a portionwhich does not change is distributed in a plurality of header fields soas to enhance the efficiency of the readout time and information amount.

[0328] As still another example, a system for supporting additionalwriting and rewriting of written data is considered as arecording/reproducing optical disk. That is, the system is a system inwhich new data can be additionally written in a portion immediatelyafter a data field in which significant data is written, data cannot bejumped to and written into a field successive to a data field in whichdata has not been written and the contents of a data field in which datahas been already written can be rewritten. Since data exists in thelead-in field of the optical disk to which access is first made, initialwriting can be performed immediately after this field.

[0329] In the optical disk system with the above construction, addressinformation can be eliminated from the header field. Since IDinformation is recorded together with user data in the sector or ECCblock in which data is already written, the access position can bedetected by reading out the above data. It is only required to record apattern used for synchronization of the start position of the sector(block) in the header field.

[0330] As described above, a signal of the conventional level slicesystem can be detected and detection delay time can be reduced bysetting the recording density of the header field in the lineardirection lower (coarse) than that of the user data recording field.

[0331] Further, a signal of the conventional level slice system can bedetected and detection delay time can be reduced by using the markposition form having a large detection margin as the informationrecording system of the header field.

[0332] Further, a readout error of the sector number due to a detectionerror can be compensated for by recording the address marks AM forattaining byte synchronization of the header field in both of the headportion and tail portion of information recorded in the header field.

[0333] Thus, it becomes possible to provide an optical disk which has alarge capacity and is high in reliability and in which the length of theto-be-changed field is reduced to improve the format efficiency bysuppressing the readout delay of the sector number of the header fieldand a readout error of the sector number due to a detection error of thedata dividing pattern in the header field can be compensated for.

[0334] Additional advantages and modifications will readily occur tothose skilled in the art. Therefore, the invention in its broaderaspects is not limited to the specific details and representativeembodiments shown and described herein. Accordingly, variousmodifications may be made without departing from the spirit or scope ofthe general inventive concept as defined by the appended claims andtheir equivalents.

What is claimed is:
 1. An optical disk for recording data comprising:header fields which are provided on tracks of one of a concentric formand spiral form and in each of which an address indicating a position onthe track is previously recorded; and recording fields whichrespectively follow said header fields and in which preset data isrecorded; wherein the recording density of said header field is lowerthan that of said recording field.
 2. The optical disk according toclaim 1 , wherein the address in said header field is recorded by use ofa pre-pit string and data in said recording field is recorded by use ofmarks formed by phase changes.
 3. The optical disk according to claim 2, wherein the minimum pit length of the pre-pit in said header field islarger than the minimum mark length of said recording field.
 4. Theoptical disk according to claim 1 , wherein said recording fieldincludes grooves or lands which are wobbled in a preset cycle, saidheader field has no wobbled grooves or lands, the length of a portion inwhich none of the wobbled grooves and lands exist due to the presence ofsaid field is an integral multiple of a length corresponding to awobbling cycle, and a phase of wobbling in a portion in which thewobbled grooves or lands are interrupted and a phase of wobbling in aportion in which the wobbled grooves or lands re-start are equal to eachother.
 5. The optical disk according to claim 1 , wherein a datarecording form in said header field is a mark position form and a datarecording form in said recording field is a mark edge form.
 6. Theoptical disk according to claim 1 , wherein a modulation code for datarecorded in said header field is different from a modulation code fordata recorded in said recording field.
 7. The optical disk according toclaim 1 , wherein data is recorded in said header field according to amodulation code whose minimum pit (mark) length is three channel clocksperiod and data is recorded in said data field according to a modulationcode whose minimum pit (mark) length is two channel clocks period. 8.The optical disk according to claim 1 , wherein a pattern (AM) fordetecting the address is recorded in said header field and the patternis recorded in a plurality of portions in the same header field.
 9. Anoptical disk recording method for recording data on an optical diskhaving header fields which are provided on tracks of one of a concentricform and spiral form and in each of which an address indicating aposition on the track is previously recorded, and recording fields whichrespectively follow the header fields and in which preset data isrecorded; wherein data is recorded on the recording field with arecording density higher than the recording density of the header field.10. The optical disk recording method according to claim 9 , wherein theaddress in said header field is recorded by use of a pre-pit string anddata in said recording field is recorded by use of marks formed by phasechanges.
 11. The optical disk recording method according to claim 10 ,wherein the minimum pit length of the pre-pit in said header field islarger than the minimum mark length of said recording field.
 12. Theoptical disk recording method according to claim 9 , wherein saidrecording field includes grooves or lands which are wobbled in a presetcycle, said header field has no wobbled grooves or lands, the length ofa portion in which none of the wobbled grooves and lands exist due tothe presence of said header field is an integral multiple of a lengthcorresponding to a wobbling cycle, and a phase of wobbling in a portionin which the wobbled grooves or lands are interrupted and a phase ofwobbling in a portion in which the wobbled grooves or lands re-start areequal to each other.
 13. The optical disk recording method according toclaim 9 , wherein a data recording form in said header field is a markposition form and a data recording form in said recording field is amark edge system.
 14. The optical disk recording method according toclaim 9 , wherein a modulation code for data recorded in said headerfield is different from a modulation code for data recorded in saidrecording field.
 15. The optical disk recording method according toclaim 9 , wherein data is recorded in said header field according to amodulation code whose minimum pit (mark) length is three channel clocksperiod and data is recorded in said data field according to a modulationcode whose minimum pit (mark) length is two channel clocks period. 16.The optical disk recording method according to claim 9 , wherein apattern (AM) for detecting the address is recorded in said header fieldand the pattern is recorded in a plurality of portions in the sameheader field.
 17. An optical disk apparatus for recording data on anoptical disk having header fields which are provided on tracks of one ofa concentric form and spiral form and in each of which an addressindicating a position on the track is previously recorded, and recordingfields which respectively follow the header fields and in which presetdata is recorded and reproducing data recorded on the optical disk,comprising: first reproduction means for reproducing data in the headerfield; second reproduction means for reproducing data in the recordingfield; determining means for determining whether a signal now reproducedis a signal from the header field or a signal from the recording field;and processing means for reproducing data by use of said firstreproduction means when said determining means determines that thesignal now reproduced is a signal from the header field and reproducingdata by use of said second reproduction means when said determiningmeans determines that the signal now reproduced is a signal from therecording field.
 18. The optical disk apparatus according to claim 17 ,wherein data is recorded in the header field based on a mark positionform and data is recorded in the recording field based on a mark edgeform.
 19. The optical disk apparatus according to claim 17 , whereindata is recorded in the header field based on a mark position form, datais recorded in the recording field based on a mark edge form, said firstreproduction means reproduces a signal of the mark position form andsaid second reproduction means reproduces a signal of the mark edgeform.
 20. The optical disk apparatus according to claim 17 , wherein amodulation code for data recorded in the header field is different froma modulation code for data recorded in the recording field and saidfirst and second reproduction means demodulate data based on differentmodulation codes.
 21. The optical disk apparatus according to claim 17 ,wherein said first reproduction means reproduces data by a level slicesignal process and said second reproduction means reproduces data by aPRML signal process.
 22. An optical disk apparatus for recording data onan optical disk having header fields which are provided on tracks of oneof a concentric form and spiral form and in each of which an addressindicating a position on the track and at least one pattern (AM) fordetecting the address are previously recorded, and recording fieldswhich respectively follow the header fields and in which preset data isrecorded and reproducing data recorded on the optical disk, comprising:first reproduction means for reproducing data in the header field;second reproduction means for reproducing data in the recording field;recording means for recording data in the recording field; firstdetection means for detecting the pattern used for detecting the addressrecorded in the header field based on a reproduction signal from saidfirst reproducing means; second detection means for detecting theaddress recorded in the header field based on a detection process ofsaid first detecting means; and processing means for reproducing data ina corresponding portion of the recording field by use of said secondreproduction means or recording data in a corresponding portion of therecording field by use of said recording means when the address detectedby said second detection means comes to an access position.
 23. Theoptical disk apparatus according to claim 22 , wherein data is recordedin the header field based on a mark position form and data is recordedin the recording field based on a mark edge form.
 24. The optical diskapparatus according to claim 22 , wherein data is recorded in the headerfield based on a mark position form, data is recorded in the recordingfield based on a mark edge form, said first reproduction meansreproduces a signal of the mark position form and said secondreproduction means reproduces a signal of the mark edge form.
 25. Theoptical disk apparatus according to claim 22 , wherein a modulation codefor data recorded in the header field is different from a modulationcode for data recorded in the recording field and said first and secondreproduction means demodulate data based on different modulation codes.26. The optical disk apparatus according to claim 22 , wherein saidfirst reproduction means reproduces data by a level slice signal processand said second reproduction means reproduces data by a PRML signalprocess.
 27. An optical disk apparatus for recording data on an opticaldisk having header fields which are provided on tracks of one of aconcentric form and spiral form and in each of which an addressindicating a position on the track and at least one pattern (AM) fordetecting the address are previously recorded, and recording fieldswhich respectively follow the header fields and in which preset data isrecorded and reproducing data recorded on the optical disk, comprising:a first reproduction section for reproducing data in the header field; asecond reproduction section for reproducing data in the recording field;a recording section for recording data in the recording field; a firstdetection section for detecting the pattern used for detecting theaddress recorded in the header field based on a reproduction signal fromsaid first reproduction section; a second detection section fordetecting the address recorded in the header field based on the resultof detection of said first detection section; and a processing sectionfor reproducing data in a corresponding portion of the recording fieldby use of said second reproduction section or recording data in acorresponding portion of the recording field by use of said recordingsection when the address detected by said second detection section comesto an access position.
 28. The optical disk apparatus according to claim27 , wherein data is recorded in the header field based on a markposition form and data is recorded in the recording field based on amark edge form.
 29. The optical disk apparatus according to claim 27 ,wherein data is recorded in the header field based on a mark positionform, data is recorded in the recording field based on a mark edge form,said first reproduction section reproduces a signal of the mark positionform and said second reproduction section reproduces a signal of themark edge form.
 30. The optical disk apparatus according to claim 27 ,wherein a modulation code for data recorded in the header field isdifferent from a modulation code for data recorded in the recordingfield and said first and second reproduction sections demodulate databased on different modulation codes.
 31. The optical disk apparatusaccording to claim 27 , wherein said first reproduction sectionreproduces data by a level slice signal process and said secondreproduction section reproduces data by a PRML signal process.